Performance of Multistage Interconnection Networks for Multiprocessor Systems

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dc.contributor.authorKumar, Sandeep
dc.contributor.supervisorBawa, Seema
dc.contributor.supervisorBansal, P. K.
dc.date.accessioned2010-11-08T12:10:52Z
dc.date.available2010-11-08T12:10:52Z
dc.date.issued2010-11-08T12:10:52Z
dc.descriptionPh.D CSEDen
dc.description.abstractMIN is one of the major components of a Multiprocessor System. MIN provides an interconnection either between processors or between processors and memory modules. In this thesis, four new fault-tolerant MINs have been proposed namely M_ASEN, M_FDOT, Hybrid and M_QUAD. M_ASEN belongs to regular category and the rest three are of irregular type. Each of the MINs has been analyzed in terms of probability of acceptance, bandwidth,fault-tolerance, reliability and hardware complexity.en
dc.description.sponsorshipDepartment of Computer Science & Engineeringen
dc.format.extent5416897 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/10266/1354
dc.language.isoenen
dc.subjectMultistage Interconnection Networks (MINsen
dc.subjectMultiprocessor Systemsen
dc.subjectFault Toleranceen
dc.subjectReliabilityen
dc.titlePerformance of Multistage Interconnection Networks for Multiprocessor Systemsen
dc.typeThesisen

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