Performance of Multistage Interconnection Networks for Multiprocessor Systems

Abstract

MIN is one of the major components of a Multiprocessor System. MIN provides an interconnection either between processors or between processors and memory modules. In this thesis, four new fault-tolerant MINs have been proposed namely M_ASEN, M_FDOT, Hybrid and M_QUAD. M_ASEN belongs to regular category and the rest three are of irregular type. Each of the MINs has been analyzed in terms of probability of acceptance, bandwidth,fault-tolerance, reliability and hardware complexity.