Design of Two-stage High Gain Operational Amplifier Using Current Buffer Compensation for Low Power Applications
| dc.contributor.author | Rajput, Sachin Kumar | |
| dc.contributor.supervisor | Hemant, B. K. | |
| dc.date.accessioned | 2009-09-17T09:09:09Z | |
| dc.date.available | 2009-09-17T09:09:09Z | |
| dc.date.issued | 2009-09-17T09:09:09Z | |
| dc.description | M. Tech. (VLSI Design and CAD) | en |
| dc.description.abstract | A need for high bandwidth operational amplifiers exists for certain applications. This requires research in the area of op amp bandwidth extension without affecting other parameters drastically. This thesis discusses the existing compensation methods for operational amplifiers and current buffer compensation approach has been adopted to design a high gain low power operational amplifier. This approach provides improved gain-bandwidth product (GBW) with good swing. The proposed classic two-stage op amp produces an open loop gain above 78 dB, gain- bandwidth product (GBW) of 5.82 MHz and 63.9o phase margin in 0.35 µm CMOS technology. The circuit is operated at the supply voltage of 3.3 V with power dissipation of 144.3 µW. The ability of the method adopted, to use the smaller compensation capacitor, Cc, which improves the slew rate, also beneficial for the area of compensation circuit. | en |
| dc.description.sponsorship | Department of Information Technology (Govt. of India) through SMDP-VLSI Project (Phase – II) and Electronics and Communication Engineering Department | en |
| dc.format.extent | 1630313 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/10266/975 | |
| dc.language.iso | en | en |
| dc.subject | Operational Amplifier | en |
| dc.subject | Current Buffer Compensation | en |
| dc.title | Design of Two-stage High Gain Operational Amplifier Using Current Buffer Compensation for Low Power Applications | en |
| dc.type | Thesis | en |
