Analytical Modeling of Drain Current in the Subthreshold Region for Double-Gate Junctionless MOSFET

dc.contributor.authorDeb Singha, Arindam
dc.contributor.supervisorChatterjee, Arun Kumar
dc.date.accessioned2015-07-23T12:48:45Z
dc.date.available2015-07-23T12:48:45Z
dc.date.issued2015-07-23T12:48:45Z
dc.descriptionME, ECEDen
dc.description.abstractThe junctionless (JL)atransistor is a resistor with uniform doping throughathe source, drain and channel regions. The fabricated junctionlessadevice with a high content of impurity concentrationawithin the channel and source/drain (S/D)aregions requires no junctions and exhibitsamany advantages, such as theasimplified flexible fabrication process, nearlyaideal subthreshold slope (SS ≈ 60 mV/dec), highaON–OFF current ratio (ION/IOFF > 107), low S/D seriesaresistance, and small drain induced barrier lowering. In this dissertation, an analytical drain current model has been obtained in the subthreshold region for a symmetrical Double Gate junctionless MOSFET. A 2-Dimensional analytical solution for Poisson’s equation has been derived by using the surface potential based charge model considering only the mobile charge carriers. A relation between the surface potential and gate voltage has been obtained in terms of Lambert-W function. Using this surface potential, the mobile charge density in the channel region has been evaluated which is used in the Pao-Sah integral in order to obtain the drain current in the subthreshold region. The developed drain current model is being compared with the drain current model of a symmetric double gate (DG) MOSFET in the subthreshold region and it has been found that the developed model has better subthreshold slope than that of the double gate (DG) MOSFET. Further, for 45 nm technologies the current-voltage characteristics of drain current model in subthreshold region for DG JL MOSFET and DG MOSFET are compared with the numerically simulated results obtained from Cogenda’s Visual TCAD tool. The developed model is in good agreement with that of the simulation results.en
dc.description.sponsorshipECED, Thapar Unoversityen
dc.format.extent84730 bytes
dc.format.extent1605450 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/10266/3388
dc.language.isoenen
dc.subjectDIBL,en
dc.subjectModeling,en
dc.subjectDG JL MOSFETen
dc.subjectSOIen
dc.subjectPDSOI,en
dc.subjectFDSOI,en
dc.titleAnalytical Modeling of Drain Current in the Subthreshold Region for Double-Gate Junctionless MOSFETen
dc.typeThesisen

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