Design and Analysis of Mem-element Emulators and their Applications

Abstract

The family of mem-elements traces its origins back to the memristor, a concept introduced by Leon Chua in 1971 as the fourth fundamental passive circuit element. HP Labs fabricated the first memristor in 2008 using nanoscale titanium dioxide films. The memristor exhibits a unique memory-dependent resistance, which changes based on the applied voltage and current history. Following this breakthrough, the concept of memory-retaining properties was extended to other passive elements, leading to the development of memcapacitors, meminductors, and memtranstors. The memcapacitor is an extension of the memristor concept, representing a capacitor with memory-dependent capacitance. Unlike conventional capacitors, a memcapacitor exhibits history-dependent charge-voltage characteristics, meaning its capacitance varies based on past input signals. Their ability to retain and dynamically adjust capacitance opens new possibilities for programmable analog circuits and chaotic oscillators. The memcapacitor emulator circuit is realized using an operational transconductance amplifier (OTA), a current differencing buffered amplifier (CDBA), and a grounded capacitor, ensuring an efficient and compact design. Simulations have been performed to validate its functionality, including transient response analysis and non-volatility testing under parametric variations. In addition, the memtranstor emulator is proposed using a current conveyor (CCII) and a voltage differencing current conveyor (VDCC). This design emulates the memtranstor’s unique flux-charge relationship and magnetoelectric-like behavior, supporting its potential use in memory-driven analog computation. The lack of commercially available mem-elements in IC form has created a need for emulator circuits replicating their characteristics. These memelements are utilized in various applications, including non-volatile memory, reconfigurable analog signal processing (such as filters and chaotic oscillators), and neuromorphic computing. Both emulator circuits were simulated using LTspice, and then implemented using 180nm CMOS technology. Transient and frequency-domain analyses confirm that the circuits effectively mimic the dynamic behavior of their theoretical counterparts.