Low Voltage CMOS Current Mirrors
| dc.contributor.author | Tikyani, Manish | |
| dc.contributor.supervisor | Pandey, Rishikesh | |
| dc.date.accessioned | 2011-12-09T07:19:59Z | |
| dc.date.available | 2011-12-09T07:19:59Z | |
| dc.date.issued | 2011-08-09 | |
| dc.description | M.Tech. (VLSI Design and CAD) | en |
| dc.description.abstract | Current mirror is the main building block of analog circuit designing which is used to copy a current through one active device by controlling the current in another active device of a circuit, keeping the output current constant regardless of loading. The responsibilities of Current Mirror circuit are current amplification and to provide proper biasing to analog circuits. In this thesis low-voltage current mirror circuit operating at the supply voltage of +1.3 volt is proposed. The proposed circuit is developed by using four p-type and five ntype transistors. The bandwidth of the proposed circuit has been enhanced using resistive compensation technique. The ac analysis of the proposed circuit has also been presented. The proposed circuit has been simulated using Cadence Design Environment in UMC 0.18 μm CMOS technology. The layout of the proposed circuit has been designed using Virtuoso editor. The post-layout simulation using Spectre has also been presented. | en |
| dc.format.extent | 3148961 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/10266/1575 | |
| dc.language.iso | en | en |
| dc.subject | CURRENT MIRROR | en |
| dc.subject | BANDWIDTH ENHANCEMENT | en |
| dc.title | Low Voltage CMOS Current Mirrors | en |
| dc.type | Thesis | en |
