Analytical Modeling of Threshold Voltage and Subthreshold Drain Current for Double-gate Junctionless MOSFET

dc.contributor.authorBharti, Aman
dc.contributor.supervisorChatterjee, Arun Kumar
dc.date.accessioned2018-08-10T11:06:08Z
dc.date.available2018-08-10T11:06:08Z
dc.date.issued2018-08
dc.descriptionMTech Thesisen_US
dc.description.abstractA Junctionless Transistor (JL) is a uniformly doped device without any source and drain junction. It allows full depletion of charge carriers when the device is turned off. The fabricated junctionless device with a high content of impurity concentration within the channel and source/drain regions requires no junctions. It exhibits many advantages, such as simplified and flexible fabrication process, nearly ideal subthreshold slope (SS ≈ 60 mV/decade), high ON–OFF current ratio (ION/IOFF> 107), low source/drain series resistance, and small drain induced barrier lowering. Within the bulk, channel is formed when a small bias is applied to the gate and current starts flowing. The channel becomes neutral under the flat band condition. In this dissertation, an analytical drain current model has been obtained in the subthreshold region for a symmetrical Double Gate junctionless MOSFET. A two Dimensional analytical solution for Poisson’s equation has been derived by using the surface potential based charge model considering only the mobile charge carriers. The effect of hot carrier injection is also considered by including interface charges at the junction of silicon dioxide and silicon film. Using this surface potential, the mobile charge density in the channel region has been evaluated which is used in the Pao-Sah integral in order to obtain the drain current in the subthreshold region. The developed drain current model and threshold voltage model for a device damaged due to localized charges is shown and it has been found that the developed model has better ON current by OFF current ratio and subthreshold slope. Further, for 40 nm technologies the characteristics of drain current model in subthreshold region for DG JL MOSFET are compared with the numerically simulated results obtained from ATLAS module of SILVACO TCAD tool. The developed model is in good agreement with that of the simulation results.en_US
dc.identifier.urihttp://hdl.handle.net/10266/5209
dc.language.isoenen_US
dc.subjectJUNCTIONLESS TRANSISTOR, DGJLT, MOSFET,TCAD,POISSON’S EQUATION,TCAD, ANALYTICAL MODELLING,en_US
dc.titleAnalytical Modeling of Threshold Voltage and Subthreshold Drain Current for Double-gate Junctionless MOSFETen_US
dc.typeThesisen_US

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