Design of Rail-to-Rail Operational Amplifier
| dc.contributor.author | Srivastav, Lokesh Kumar | |
| dc.contributor.supervisor | Iliyas, Mohd. | |
| dc.date.accessioned | 2009-09-17T09:12:29Z | |
| dc.date.available | 2009-09-17T09:12:29Z | |
| dc.date.issued | 2009-09-17T09:12:29Z | |
| dc.description | M.Tech. (VLSI Design and CAD) | en |
| dc.description.abstract | In the thesis a compact two stage rail to rail OP-Amp with rail to rail common mode inputs and rail to rail output swing reaching nearly 95% of total supply voltage. The design is implemented using 0.35µm, 3.3V TSMC CMOS n-well process. The OP-Amp contains a constant gm rail to rail input stage and class AB output stage. This compact operational amplifier provides differential voltage gain 95 dB, unity gain frequency 8.38 MHz, phase margin 550 while driving a 10pf load capacitor and power consumption is 512 µW. A rail to rail input common mode range is an important requirement in operation amplifier for some application. Conventional techniques to achieve a constant gm rail to rail complementary N-P differential input stage require complex additional circuitary. In addition, the frequency response and common mode rejection ratio (CMRR) are degraded. A power efficient technique to overcome these problems has been utilized in this work. Simulation results demonstrate very less variation in the low frequency differential voltage gain with change in input common mode level. | en |
| dc.description.sponsorship | Department of Information Technology (Govt. of India) through SMDP-VLSI Project (Phase – II) and Electronics and Communication Engineering Department | en |
| dc.format.extent | 1807148 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/10266/978 | |
| dc.language.iso | en | en |
| dc.subject | Rail to Rail | en |
| dc.subject | Op-Amp | en |
| dc.title | Design of Rail-to-Rail Operational Amplifier | en |
| dc.type | Thesis | en |
