Design of Fully Self Bias Continuous Time CMOS Bandpass Gm-C Filter
| dc.contributor.author | Banga, Vaibhav | |
| dc.contributor.supervisor | Agarwal, Alpana | |
| dc.date.accessioned | 2009-08-17T11:07:38Z | |
| dc.date.available | 2009-08-17T11:07:38Z | |
| dc.date.issued | 2009-08-17T11:07:38Z | |
| dc.description | Department of Electronics & Communication Engineering | en |
| dc.description.abstract | The present work addresses the design of fully self biased continuous-time CMOS bandpass Gm-C filter using a design methodology based on the g_m/I_D transistor characteristics. This analog module was analyzed, designed and prototyped in TSMS 0.35μm CMOS technology. Experimental results are presented, in order to validate the methodology. The filter has a pass-band central frequency of about 5.011MHz, quality factor of 19.28, Gain of 23.48 dB at center frequency and a current consumption of 288.48 μA. The circuit does not have need of any DC external biasing circuit, only need to apply VDD (3.3 V). Here self biasing has been introduced with power consumption of 952μW. The results have been taken with load variations, temperature variations, power supply variations and process corner variations, LVS and PEX have been generated from the layout. This circuit used in real time high frequency applications as in RF communication. | en |
| dc.description.sponsorship | Department of Information Technology (Govt. of India) through SMDP-VLSI Project (Phase – II) | en |
| dc.format.extent | 2446249 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/10266/881 | |
| dc.language.iso | en | en |
| dc.subject | Band Pass Filter | en |
| dc.subject | Gm-C | en |
| dc.subject | Gm/ID | en |
| dc.subject | Self biased | en |
| dc.subject | Continuous Time | en |
| dc.title | Design of Fully Self Bias Continuous Time CMOS Bandpass Gm-C Filter | en |
| dc.type | Thesis | en |
