Efficient Hardware Implementation for the Advanced Encryption Standard and RC6 Algorithm

Abstract

Most cryptographic algorithms function more efficiently when implemented in hardware than in software running on single processor. However, systems that use hardware implementations have significant drawbacks: they are unable to respond to flaws discovered in the implemented algorithm or to changes in standards. As an alternative, it is possible to implement cryptographic algorithms in software running on multiple processors. However, most of the cryptographic algorithms like DES (Data Encryption Standard) or 3DES have some drawbacks when implemented in software: DES is no longer secure as computers get more powerful while 3DES is relatively sluggish in software. AES (Advanced Encryption Standard), which is rapidly being adopted worldwide, provides a better combination of performance and enhanced network security than DES or 3DES by being computationally more efficient than these earlier standards. Furthermore, by supporting large key sizes of 128, 192, and 256 bits, AES offers higher security against brute-force attacks. In this thesis, AES and RC6 have been implemented. A brief overview and understanding of the RC6 Block Cipher algorithm is given. A comparison to the criteria and requirements given by the National Institute of Standards for consideration as the new Advanced Encryption Standard is made. So it is concluded that the RC6 algorithm is a good solution and applies well to most platforms, but not to all due to performance and security issues. The VHDL coding of AES algorithm and RC6 algorithm, their FPGA implementation by Xilinx Synthesis Tool on Virtex II pro kit have been done. The output of RC6 has been displayed on LCD of Spartan 3E kit. The synthesis results show that the computation time for generating the ciphertext by AES with 16 sbox and 2 dual port RAM is 4.403 ns, while for the architecture with 16 sbox and 8 dual port RAM is 5.463 ns and for architecture with 4 sbox and 2 dual port RAM is 6.922 ns.