Design and Analysis of High Performance Voltage Reference Circuits

Abstract

Nowadays, low-voltage and low-power integrated circuits (ICs) are gaining importance due to the increased demand for portable electronic systems like hearing aids, music players, digital cameras, laptops, mobile phones, etc. An essential part of analog and mixed-signal circuits designing is the realization of reliable and precise voltage references. A voltage reference in an entire circuit establishes a stable reference point which is used by other sub-circuits to generate predictable and repeatable results. This reference point mustn't change significantly under various operating conditions. Therefore, the voltage reference should have a low-temperature coefficient, high power supply rejection ratio (PSRR), low supply voltage requirement, low power consumption, small occupied chip area, etc. to improve the performance of the entire circuit. But it is difficult to improve all the parameters simultaneously, and therefore, in the thesis four different CMOS voltage references namely, CMOS voltage reference-I, CMOS voltage reference-II, CMOS voltage reference-III, and CMOS voltage reference-IV are proposed to achieve optimum values of these performance parameters. The proposed voltage references have been simulated in 180 nm standard CMOS technology using Cadence virtuoso analog design environment and the simulation results of these proposed voltage references have been compared with the voltage references available in the literature. The proposed CMOS voltage reference-I and CMOS voltage reference-II are based on the addition of proportional-to-absolute-temperature (PTAT) and complementary-to-absolute-temperature (CTAT) behaviours to generate their output reference voltages. The proposed CMOS voltage reference-I operating at a supply voltage of 0.85 V has a low temperature coefficient of 21.9 ppm/°C over a temperature range of -60 °C to 120 °C and a PSRR of -65.85 dB at 100 Hz. To improve the PSRR of the proposed CMOS voltage reference-I, another voltage reference named proposed voltage reference-II operating at a supply voltage of 0.8 V has been presented which offers a PSRR of -91.69 dB at 100 Hz and a temperature coefficient of 29.5 ppm/°C over a temperature range of -55 °C to 125 °C. Generally, the PTAT behaviour generator circuits require a large number of transistors, and therefore, the voltage references which are based on the addition of PTAT and CTAT behaviours do not offer much improvement in terms of power consumption, and area. In view of this, CMOS voltage reference-III is proposed which uses only CTAT behaviours to generate its output reference voltage. The proposed CMOS voltage reference-III operating at a supply voltage of 0.8 V, consumes low power of 2.75 µW and occupies a small area of 0.0027 mm2. The proposed CMOS voltage reference-III has a temperature coefficient of 38.85 ppm/°C over a temperature range of -40 °C to 125 °C and PSRR of -80.84 dB. To further improve the performance parameters such as supply voltage requirement, temperature coefficient, and PSRR of the CMOS voltage reference-III, another voltage reference named CMOS voltage reference-IV has been proposed. The proposed CMOS voltage reference-IV operating at a low supply voltage of 0.65 V, also uses only CTAT behaviours to generate its output reference. The proposed voltage reference-IV has a low power consumption of 1.95 µW, a temperature coefficient of 31.5 ppm/°C over a temperature range of -55 °C to 125 °C, and a PSRR of -85.4 dB. To validate the performances of the proposed voltage references, these voltage references have been employed in the conventional LDO and it is observed that the LDOs based on proposed voltage references show improved PSRR, load regulation, temperature coefficient, and line sensitivity than the LDO based on a conventional voltage reference.