Design of Low Power Operational Amplifier

dc.contributor.authorKamra, Anand
dc.contributor.supervisorAgarwal, Alpana
dc.date.accessioned2010-10-20T06:03:25Z
dc.date.available2010-10-20T06:03:25Z
dc.date.issued2010-10-20T06:03:25Z
dc.descriptionM.Tech (VLSI DESIGN and CAD)en
dc.description.abstractThe main objective of this thesis is to decrease power dissipation. A low power CMOS operational amplifier using weak inversion region of MOSFET for biomedical instrumentation operating with a 1.8V supply is described. The opamp is designed in UMC .18 m CMOS technology using tool cadence. Two types of compensation techniques (a) RC compensation (b) Current buffer are used. With RC compensation technique, the open loop gain is 76.97 db, the gain bandwidth product (GBW) is 489.9 kHz, CMRR obtained is 79.11 db, with large range of ICMR 0V to 1.689V and phase margin is 56.09 degree with 10pF load. The power consumption is 1.516 W. With Current buffer compensation technique, the open loop gain is 76.21db, the gain bandwidth product (GBW) is 743.2 kHz, CMRR obtained is 157.1db, with large range of ICMR 0.119V to 1.54V and phase margin is 62.77 degree with 10pF load. The power consumption is 3.69 W. Current buffer compensation technique provide high CMRR, high gain bandwidth product and high phase margin as compared to RC compensation technique. Also, area requirement for current buffer compensation technique is very less as compared to RC compensation technique. In this thesis work PVT variations are also given. Process variations management techniques are also discussed.en
dc.description.sponsorshipDIT (Govt. of India) through SMDP - VLSI Project and Electronics and Communication Engineering Department, Thapar University, Patialaen
dc.format.extent1437207 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/10266/1307
dc.language.isoenen
dc.subjectLOW POWER OPAMPen
dc.subjectWEAK INVERSIONen
dc.subjectSUBTHRESHOLDen
dc.titleDesign of Low Power Operational Amplifieren
dc.typeThesisen

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