Energy efficient memristor based non volatile memory cell design

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Memories form an integral part in computing, microprocessor and modern electronic devices. With the ever increasing demand of storing, large digital information which needs to be reliable, scalable, quickly accessible and also power efficient, different memory technologies unfolded with time. Memristor based circuits is an emerging technology, especially in memory architecture offering attractive combination of reliability, high speed and low power making it a powerful and efficient candidate for next generation memories. However, memristor device and its circuit level characterization still lies at its infancy stage and hence, it demands an extensive research and development to take its full benefit for various applications. With the advancement towards latest technology nodes, the reliability of conventional memories gets significantly affected for lower supply voltage. Conventional memories like SRAM, DRAM, and flash memories have limitations and are unable to serve the growing demand of high density and low power. Thus, new semiconductor memories need to be explored and recently found memristor presented itself as a promising substitute for future memories or circuits. Memristor is a passive device which has a property of retaining its past value in the form of physical entity called memristance. Memristive devices need only two terminals to operate, being compatible with the today’s predominant CMOS technology, uses less wafer space, and most suitable for memory architecture as in this resistance is used as a stored variable. In this thesis work, new approach of designing a memristor based non-volatile memory cell is proposed. The simulation results have also been shown to demonstrate the proper functioning of the memory cell and its advantages in terms of energy, area and speed of operation making memristor based memory cell as a promising substitute for the future. The design was simulated in GPDK 45nm CMOS technology with a supply voltage of 1V using VTEAM memristor model in Cadence Virtuoso Analog Design environment

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