A Novel Architecture for Sample Rate Converter using FIR filter

Abstract

In digital signal processing, the use of different sampling rates within a system becomes an important topic. Different sampling rates are used for different systems. Sampling rate Conversion has many applications in communication and signal processing, where two systems with different sampling rates need to be interconnected. The aim of digital sampling rate converter is to generate a discrete time signal from one sample rate to another. When sampling of signal is done, some information is lost and in the process of re-sampling of signal, some sort of distortion is introduced. The generation of output samples from input samples may be performed by the applications of various techniques. There are two basic methods to convert the sampling rate. In the first method the signal is re-sampled after converting it in analog domain. In the second method digital signal processing techniques are applied to get the new samples from the existing samples. The second technique introduces low distortion and noise. When sampling rate of a discrete time signal is to be increased, it is passed through interpolator followed by anti imaging filter. When sampling rate is to be decreased, the anti aliasing filter is used prior to decimator. In rational sample rate converter common filter, which works as anti imaging as well as anti aliasing filter is used between interpolator and decimator. In most of the cases of sample rate conversion, FIR filters are preferred over IIR filters because they do not possess feedback loops and are easier to implement than IIR filters. Moreover the phase response of FIR filter is linear, so the phase distortion of output signal is minimized. In this thesis, various techniques of FIR filter implementations for rational sampling rate conversion are discussed keeping in mind that during filter operation after interpolation some of the samples are zero and in the process of decimation some of the signal values are to be discarded. Efficient implementation of Lth band filter using coefficient symmetry is proposed for which implementation complexity is lower than other implementations. Also for the larger values of Interpolation and decimation, multistage implementation is proposed which reduces the filter order requirement and computational complexity.