Design of Dual Output Differential Pair Second Generation Current Conveyor

Abstract

Current Conveyors have proved to be the emerging class of current mode circuits. It is an extremely flexible and versatile analog building block used for both current and voltage processing applications. Among the three generations of current conveyors, second generation current conveyors are widely used. Current Conveyors give high performance parameters in terms of high frequency response, high current and voltage gain, high current and voltage transfer bandwidth, low power consumption and low supply voltage requirement. In the thesis, CMOS class AB dual output differential pair second generation current conveyor (DODCCII) and quasi floating gate MOSFET based dual output differential pair second generation current conveyor (QFGDODCCII) are presented. The feedback network is used in the circuit to obtain low parasitic resistance. The DODCCII uses current mirror load for the differential pair whereas the QFGDODCCII eliminates the current mirror load and uses quasi floating gate MOSFET as the input transistors of the differential pair. The circuits have high current and voltage gains, high current and voltage transfer bandwidths at two different nodes Zand Z+, high power dissipation, high output impedance and low supply voltage requirement. The QFGDODCCII has rail to rail dynamic range of -0.7V to 0.7V and low parasitic input impedance of 8.53Ω.The above discussed circuits are designed and simulated in 0.18µm BSIM3V3 environment.