Design of Low Drop-out Voltage Regulator with Improved PSRR and Low Quiescent Current

Abstract

Portable electronic devices mostly use batteries as their primary source for operation. Hence, longer running batteries or power sources are vital for any portable device. Need of stable voltage supplies have led to development of low drop-out voltage regulators. Low drop-out voltage regulator provides stable regulated output voltage in various operating conditions, which makes it so useful in portable devices. The design of high performance and stable low drop-out voltage regulators is a challenge nowadays with decreasing device sizes and increasing power densities.

In the dissertation, a capacitor-less Low Drop-out Voltage regulator has been designed with improved PSRR and low quiescent current. The proposed circuit is simulated using Cadence in 180nm CMOS technology parameters with the supply voltage of 1.8V. The proposed circuit provides 1.25V as the output voltage with PSRR of -61.5 dB and quiescent current of 290μA. For improvement of PSRR, high gain two-stage operational amplifier has been designed with miller compensation and ESR compensation technique. The transmission gate is used in the error amplifier circuit as an active resistor in place of nulling resistor. The vital parameters of LDO have also been compared with existing LDO circuits available in literature.