VLSI Test Generation Using Object Oriented Approach

Abstract

The report presents a CAD Tool for Automatic Test Pattern Generation (ATPG). The problem of test generation for VLSI circuits can be characterized as the search of N-dimensional 0-1 state space, where N is the number of primary inputs in the circuit and is known to be NP-complete. The basic concepts common to most test generation algorithms, such as implication, sensitization, justification, implicit enumeration, and backtracking are explained in detail. Various automatic test generation algorithms-D-algorithm, PODEM,FAN are discussed and compared. ATPG algorithm uses various heuristics, which play a major role to spend up the ATPG process as they prune the search space effectively. To further accelerate the Test pastern generation process, various parallel processing algorithms are suggested. Object oriented approach has been used to analyze and design the ATPG process, leading the inherent benefits of approach like reusability of design and code, easier maintenance, portability etc. The core of the testing tool, the FAN algorithm is implemented using the object oriented approach. Object oriented analysis and design of FAN is presented in detail.