Implementation of High Speed Fixed and Floating Point CORDIC Techniques

Abstract

CORDIC is an acronym for COrdinate Rotation Digital Computer. It is a class of shift and add algorithms for rotating vectors in a plane, which is usually used for the calculation of trigonometric functions, multiplication, division and conversion between binary and mixed radix number systems of DSP applications, such as Fourier Transform. A fast and energy-efficient CORDIC for the calculation of elementary function is always needed in electronics systems i.e. DSP processors, image processing and arithmetic units in microprocessors. On VLSI implementation level, the area also becomes quite important as more area means more system cost. The three parameters i.e. power, speed and area are always traded off. For DSP processors area and speed are the main ones. But sometimes, increasing the speed also increases the power consumption, so there is an upper bound of speed for a given power budget. Since elementary functions calculation dominates the execution time of most DSP algorithms, so there is need for high speed CORDIC algorithm. In this thesis, a very high speed CORDIC algorithm is implemented for fast calculations of trigonometric functions. VHDL is used to implement a technology-independent design. Main drawback of CORDIC algorithm is that to converge to N bit of accuracy, N iterations are required. So, in this thesis, three types of CORDIC algorithm that are Original CORDIC, Control CORDIC and Angle Recoding CORDIC in which number of iterations get reduce are discussed. There are two types of representations for real numbers that is fixed point and floating point. The comparison of Original CORDIC, Control CORDIC and Angle Recoding CORDIC for sine-cosine generation on the basis of their speed, area and number of iterations for 16 bit, 24 bit and 32 bit fixed point number have been discussed. The advantage of floating-point representation over fixed-point (and integer) representation is that it can support a much wider range of values. So, in this thesis, a high speed Original CORDIC for sine cosine generation for 24 bit, 28 bit and 32 bit (single precision IEEE 754-2008) floating point numbers is also synthesized. The design is simulated on Modelsim SE and synthesized on Xilinx 13.1i. The Thesis pays a significant attention to the analysis of CORDIC algorithm in terms of speed so as to maximize throughput.