Low Power Operational Amplifier for Low-Pass Sigma-Delta Modulator
| dc.contributor.author | Hemant, B. K. | |
| dc.contributor.supervisor | Singh, Nirmol Rattan | |
| dc.date.accessioned | 2008-09-04T06:59:31Z | |
| dc.date.available | 2008-09-04T06:59:31Z | |
| dc.date.issued | 2008-09-04T06:59:31Z | |
| dc.description.abstract | In a never-ending effort to reduce power consumption and gate oxide thickness, the integrated circuit industry is constantly using smaller power supplies. Today’s analog circuit designer is faced with the challenges of making analog circuit blocks with low power supplies with little or no reduction in performance. Furthermore, in an effort to reduce costs and integrate analog and digital circuits onto a single chip. In present work operational amplifier has been designed with TSMC 0.18µm & VDD=1.8V, keeping in mind the key specifications power dissipation lesser than 0.5mW, low frequency gain of minimum 60dB and unity gain bandwidth of 15MHz for the application in low-pass sigma delta modulator. To achieve these specifications best compromise between power dissipation, low frequency gain and bandwidth is maintained. The layout of the designed amplifier has been matched with schematic using caliber LVS run on Mentor Graphics tool. | en |
| dc.description.sponsorship | Department of Information Technology (Govt. of India) through SMDP-VLSI Project (Phase – II) | en |
| dc.format.extent | 1820296 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/10266/631 | |
| dc.language.iso | en | en |
| dc.subject | Low Power | en |
| dc.subject | Operational Amplifier | en |
| dc.subject | GM-id Approach | en |
| dc.title | Low Power Operational Amplifier for Low-Pass Sigma-Delta Modulator | en |
| dc.type | Thesis | en |
