Evolutionary approach for solving standard cell placement In VLSI physical design automation

dc.contributor.authorKaur, Jobanpreet
dc.contributor.supervisorKaur, Maninder
dc.date.accessioned2013-09-19T04:46:36Z
dc.date.available2013-09-19T04:46:36Z
dc.date.issued2013-09-19T04:46:36Z
dc.descriptionMaster of Technology-CSA, Dissertationen
dc.description.abstractThe increased complexity in VLSI cell placement due to increase in number of transistors requires the application of various heuristic approaches including evolutionary approaches for obtaining better results. Evolutionary approaches are able to produce high quality placement solutions for standard cell circuits in comparison to other sophisticated algorithms. This work proposes an algorithm named, Evolutionary Approach for Standard Cell Placement problem (EASCP). The proposed algorithm follows a variant of genetic paradigm where a trial value is associated with each candidate solution of the population to improve the quality of solution by replacing the abandoned solutions. With a key feature of exploring the solution space, the proposed EASCP uses a repository for keeping track of the best solutions per generation, thereby, exploiting the solution space. The algorithm was simulated on test circuits. The experimental results obtained a layout with better wirelength in comparison to simple genetic algorithm at the cost of fractional increase in runtime.en
dc.description.sponsorshipSchool of Mathematics and Computer Applications, Thapar University, Patialaen
dc.format.extent1562894 bytes
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/10266/2477
dc.language.isoenen
dc.subjectStandard Cell Placementen
dc.subjectVLSI Physical Design Automationen
dc.subjectgenetic algorithmen
dc.titleEvolutionary approach for solving standard cell placement In VLSI physical design automationen
dc.typeThesisen

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