Design of Rail- to- Rail Operational Amplifier

Abstract

In the present work a rail-to rail operational amplifier has been using overlapping of the transition region with level shifter. The op amp presented in this thesis work is a compact two stage op amp with rail-to-rail inputs with the output swing reaching nearly 90% of the total supply voltage, over 111dB of low frequency gain. The design is implemented on a 0.35μ 3.3V TSMC CMOS n-well process. The op amp contains a constant-gm rail-to-rail input stage, and is compensated using Miller pole splitting technique, resulting in a unity gain frequency greater than 7.7 MHz and a phase margin of about 60º while driving a 10pF load capacitor. The compact design provides power consumption of is less than 1.3mW. A rail-to-rail input common mode range is an important requirement in operational amplifiers for some applications. Conventional techniques to achieve a constant-gm rail-to-rail complementary N-P differential input stage require complex additional circuitry. In addition, the frequency response and common-mode rejection ratio (CMRR) are degraded. An economical but efficient design technique to overcome these problems has been utilized in this work. The technique used overlaps the transition regions of the tail currents by using level shifter between the NMOS differential pairs and PMOS differential pairs to achieve constant overall transconductance. Simulation results demonstrate that gm variation is restricted to within 7% with improved CMRR and less variation in the low frequency voltage gain with the change in input common mode level.