Designing and Implementation of Direct Memory Access Controller

Abstract

A high performance Programmable Direct Memory Access Controller (DMAC) is widely used for transferring the data between CPU memory and the peripherals. The DMAC on a motherboard manages all the transfers. DMAC is specifically designed for high speed data acquisition devices. DMA also minimizes latency in servicing a data acquisition device because the dedicated hardware responds more quickly than interrupts, and transfer time is short. DMA controller contained 4 independent 8-bit channels consisting of both an address register and counter. DMAC can handle up to four requests, but at one time only one is processed. The requests are prioritized by certain priority techniques i.e. fixed and rotating priority. Its channels can be extended by cascading without any additional circuitry. The 8237 can be configured to work with 8-bit and 16-bit microprocessor. As in a DMAC at a time only one channel is in functional state, rest all are waiting for processing according to there priority, so thesis work includes the data transfer by a DMAC considering only one channel. In this thesis work, Programmable Direct Memory Access Controller is designed in Verilog HDL and functional simulation is done in ModelSim and ISE. The design achieves the clock frequency of 44.20 MHz and consumes the total power of 35 mW