Design and implementation of a dynamic range detection based multiplier

Abstract

In today’s world of portable and super fast electronic gadgets, power and speed are of major concern. A good battery back up is desirable for a product. Multiplication is used in nearly every field whether it is Digital Signal Processing, image processing or arithmetic units in microprocessors and contributes largely to the total power consumption. On VLSI implementation level, the area also becomes quite important as more area means more system cost. So power, speed and area are three important parameters in VLSI Design. Increase in speed will lead to increased power consumption. Hence these parameters are always traded off. In this thesis, an architecture for power efficient Dynamic Range Detection Based multiplier with compressors at the accumulation stage has been proposed. Dynamic Range Detection technique chooses the operand which on being taken as multiplier gives more partial product rows as zero. This will reduce the switching activity and hence power consumption is reduced. For partial product generation, Booth’s recoding is used. Booth’s Algorithm speeds up the multiplication as number of partial product rows is reduced. The level of reduction depends upon the radix r used. Wallace and Dadda algorithms are implemented at the accumulation stage which use half adders and full adders to sum up the partial product rows. In the Wallace algorithm, the partial product rows are reduced as soon as possible where as in Dadda minimum reduction is done at each level. Further compressors of different orders are used to sum up the partial product rows. These can compress three, four, five or seven rows to final two rows at a time and hence speed is increased as order of compressor increases. So carry save adders are used for partial product accumulation and carry propagating adder for adding last two rows. These multipliers have been designed with the help of VHDL, simulated and synthesized on Xilinx ISE 14.5 targeted on Spartan 3E FPGA. Comparisons have been done in terms of delay, power and area.