Enhancement of USB2PHY Test Suite

Abstract

USB2PHY TEST SUITE aims to verify USB IP RTL/Netlist considering all test conditions including corner cases too. The advantage of this suite is that the USB IP RTL/Netlist behavior can be verified for small changes made in the design. The environment is so flexible that any particular test condition can be realized and IP can be verified against that test condition. The purpose of host controller and device controller is served by test-benches. It consists of 108(original) test-cases which are to be verified. More test conditions are to be enlisted from the available documents for USB_2.0 specifications and UTMI_1.05 specifications. The purpose of the thesis is to enlist more test conditions and write VHDL code for those test conditions along-with the verification and debugging of existing test environment. By the time of completion of this thesis 60 more test-cases have been written. For these 60 new test conditions and also for existing 108 some new procedures have been written and some existing procedures have been modified.