Methodology and Validation of Power Management Flows
| dc.contributor.author | Sharma, Vibha | |
| dc.contributor.supervisor | Singh, Hardeep | |
| dc.contributor.supervisor | Murthy, Keshava B | |
| dc.date.accessioned | 2025-08-04T08:43:02Z | |
| dc.date.available | 2025-08-04T08:43:02Z | |
| dc.date.issued | 2025-08-04 | |
| dc.description.abstract | The quick rise of mobile devices, high-performance computers, and data centres has made it necessary to use advanced power management methods to cut down on energy use without hurting performance. Dynamic Voltage and Frequency Scaling (DVFS) is one of the best ways to control how much power processors use. It changes the voltage and frequency based on how much work they have to do. This report talks about the ideas, uses, and power controller architectures that make DVFS work, focusing on its importance in today's power management strategies. The report also talks about different power management states, such as C-states, G-states, and P-states, and how they work together to make the system use less power when it's idle and when it's working. The study talks about two types of power management: idle power management, which tries to use less power when the system is not doing much, and active power management, which tries to use power more efficiently when the system is working hard. The method includes looking at current power management models and getting a full picture of the technologies involved. The report also talks about the problems and limits of DVFS, such as latency, lower performance when scaling, and the difficulties of implementing it in multi-core and heterogeneous systems. The report gives a complete picture of how dynamic voltage and frequency adjustments can save a lot of energy and improve performance by looking at real-world uses like mobile devices, embedded systems, and data centres. The conclusion talks about possible future directions for research on power management, especially in relation to more advanced processors and systems that care about energy. | en_US |
| dc.identifier.uri | http://hdl.handle.net/10266/7054 | |
| dc.language.iso | en | en_US |
| dc.subject | C-states | en_US |
| dc.subject | G-states | en_US |
| dc.subject | P-states | en_US |
| dc.subject | Power Management | en_US |
| dc.subject | Active States | en_US |
| dc.subject | Idle | en_US |
| dc.title | Methodology and Validation of Power Management Flows | en_US |
| dc.type | Thesis | en_US |
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