Analysis and Design of Power Efficient Multiplierless Digital FIR Filter using Radix-2r Algorithm

Abstract

The advent of the information era has made the use of digital device such as digital cameras, hand phones, hearing aids etc. more and more pervasive. In all these digital devices, the Digital Finite Impulse Response (FIR) filters act as an essential component. In the past few decades, the design and implementation of low hardware cost and low power FIR filters has been a most dedicated topic of research and many efforts are being made in order to save the cost of production of these products along with an increased battery life. There are many techniques available for the designing of such type of filters but the design and implementation of multiplierless FIR filters served as the most successful one because in this technique, the general coefficient multipliers can be replaced by adders and shifts. The fact that the shifts are cost free because they can be hard-wired and only the numbers of adders used, constitute the hardware cost of the multiplierless FIR Filters reduces the overall cost of the filters. It is also believed that the power consumption is also indirectly reduced by the use of adders. Hence, it can be said that the existing algorithm mainly aims at minimizing the order cost but this is achieved at the cost of increased computational complexity for the designing of long filters and the choice of minimum number of adders to be used for minimum power consumption is too coarse and inaccurate. Therefore, the research work in this thesis deals with the issues of designing multiplierless FIR filters to minimize the power consumption. Reducing the adder depth and switching activity of the filters is the key foundation. Radix-2r multiple constant algorithm is used for reducing the adder depth and a reduction in switching power is achieved using a low power technique. Hence, overall power reduction is achieved.