Implementing Generic Built-In Self Test for Testing Kilo-Bit Memories

Abstract

The report presents the implementation of Generic Built-in Self Test (GBIST) engine for at-speed testing of semiconductor memories embedded in high performance application specific System on Chips (SoCs). Embedded memory continues to represent a larger portion of today's SoCs. Because of this trend, and the nature of a memory’s small geometries, implementing a sound memory testing strategy is one of the most significant design decisions. Application of test patterns using off-chip testers results in a high test time due to the large sizes of embedded memories. Also the limited resources on the external tester (ports, memory, etc) have forced the system designers to introduce self testing logic within the system itself, more popularly known as Built-in Self Test (BIST). The computed test sequences to test faults in embedded memories are generated on-chip using a memory Built-In Self Test (BIST) unit. The fine geometries typical of an embedded memory make it susceptible to subtle defects. Testing it requires a thorough set of patterns strategically chosen to expose manufacturing defects. GBIST engine provides test circuitry that applies, reads, and compares test patterns to expose these defects. It is designed to save chip area and achieve high fault coverage with minimal test time and implements the industrystandard memory test algorithms. These algorithms include the common MARCH C and Checkerboard algorithms, along with varied pattern backgrounds and many others.