DSP Core Design Using FPGAs

Abstract

Digital filtering algorithms are most commonly implemented using general purpose DSP chips for audio applications, or special purpose digital filtering chips and application specific integrated circuits (ASICs) for higher rates. However, with product life cycles shrinking, it is becoming increasingly difficult to complete development of the complex software required to program DSP processors in a timely manner. Furthermore, the DSP approach suffers from complications when applied to very high performance application like video etc. The high sample rates may require multiprocessor configurations, making the software development process even more complex. This work describes a coefficient dependent multiplication scheme for the implementation of 16-Tap, 8-Bit Finite Impulse Response (FIR) digital filter core on Xilinx XC4000 series Field Programmable Gate Arrays (FPGAs). FPGAs are a technology which gives the designer the flexibility of a programmable solution, the performance of a custom solution, and lowering overall cost. The advantages of the FPGA approach to digital filter implementation include higher sampling rates than are available from traditional DSP chips, lower costs than an ASIC. The FPGA also adds design flexibility and adaptability with optimal device utilization conserving both board space and system power which is often not the case with DSP chips. The filter core developed is a low pass filter with a cut-off frequency of 2.2MHz and the design is embedded in Xilinx XC4003EP84 device and the core occupies about 70 of the Silicon area. The core is developed to operate at a sampling rate of 5.44 MHz and a clock frequency of 49 MHz. The core is designed for speed as well as area optimization. The results obtained show the trade-off between speed of operation and silicon area occupied of the FPGA device used. The remaining portion of the device space can be used to integrate the rest of the circuitry in complex DSP system like A/D and D/A converters etc. Therefore, FPGAs offer complete DSP system to be built in a single chip. This new approach makes use of the core to save development time while focusing engineering time and energy on those parts of the design that add value and differentiation. Core based designs have the advantages of faster time-to-market, reduced place and route time with preplaced cores, less engineering required with predesigned cores, facilitates design reuse and optimal core layout produces lower power dissipation.