Modeling of Nanoscale MOSFETS and their Circuit Level Implementation

Abstract

In this thesis work, an analytical model has been developed for a ballistic nanoscale metal oxide semiconductor field effect transistor (MOSFET). Ballistic operation signifies that the channel length of the device is less than the mean free path of the charge carriers, resulting in a transport phenomenon without the effects of carrier scattering. To achieve ballistic operation the said MOSFET has been modeled considering low temperature (77 K) and intrinsic silicon channel. The model is then compared with the numerical simulations to verify its functionality. In order to obtain the model for a ballistic nanoscale MOSFET structure, firstly, we present an analytical model for gate to channel capacitance (CGC) considering intrinsic silicon channel and a triangular potential well for electronic motion within the channel. This model incorporates quantum mechanical effects, drain induced barrier lowering (DIBL) and short channel effects (SCE). We evaluate the charge density in the channel using two-dimensional (2D) density of states and then solve 1D Schrodinger’s wave equation to determine average separation charges from the interface which facilitates the evaluation of CGC. The evaluated CGC is then validated with the self-consistent results of Hareland et al. and van Dort’s model. Next, the drain current is obtained employing the evaluated CGC within the framework of Landauer-Buttiker formalism and the device threshold voltage is estimated. The obtained model for ballistic MOSFET overestimates the available experimental data of a near ballistic bulk MOSFET. The effects due to surface roughness scattering and back scattering are then included in this model to obtain a model for a near ballistic bulk MOSFET. The I-V characteristics are compared with the experimental results and are found to be in good agreement.Further, a nanoscale near ballistic MOSFET is designed, considering intrinsic silicon channel at very low temperature, using SILVACO TCAD tool and the I-V characteristics are obtained. The obtained numerical simulation results are compared with the developed model and are found to be in good agreement for higher drain voltages. The functionality of the designed MOSFET is verified by implementing it in a resistive load inverter. The designed MOSFET is also implemented in an inverter pair circuit using MixedMode module of SILVACO TCAD tool. The simulation result so obtained confirms the validity of the nano MOSFET. It is therefore clear that for a ballistic nano MOSFET model one must consider the quantum confinement of inversion charges in the channel region and also the effect of inversion layer charge capacitance. Thus it is likely that an inverter circuit implemented using a nanoscale ballistic MOSFET incorporating these effects could be the possible building block of an integrated circuit giving better switching speed and hence the performance as compared to the other inverter circuits with conventional MOSFET designs.