CORDIC Based Direct Digital Frequency Synthesizer

Abstract

Traditional designs of high bandwidth frequency synthesizers employ the use of a phase-locked-loop (PLL). A direct digital frequency synthesizer (DDFS) provides many significant advantages over the PLL approaches. Fast settling time, sub-Hertz frequency resolution, continuous-phase switching response and low phase noise are features easily obtainable in the DDFS systems. Although the principle of the DDFS has been known for many years, the DDFS did not play a dominant role in wideband frequency generation until recent years. Earlier DDFSs were limited to produce narrow bands of closely spaced frequencies, due to limitations of digital logic and D/A-converter technologies. Recent advantages in integrated circuit (IC) technologies have brought about remarkable progress in this area. By programming the DDFS, adaptive channel bandwidths, modulation formats, frequency hopping and data rates are easily achieved. This is an important step towards a “software-radio” which can be used in various systems. The DDFS could be applied in the modulator or demodulator in the communication systems. The applications of DDFS are restricted to the modulator in the base station. Direct digital frequency synthesizer (DDFS) is a digital technique for generating sinusoids. Unlike conventional analog oscillator structures, DDFS can be applied where fast frequency switching, fine tuning and a coherent phase relationship among sinusoids are required. The circular-mode CORDIC (coordinate rotation digital computer) algorithm is an iterative method to compute sine/cosine values, in which an initial vector is rotated by a predetermined sequence of sub-angles in such a way that the summation of the rotations approaches the given angle. CORDIC has been a widely-adopted method for implementing the sine/cosine generator in DDFS. When compared to the ROM look-up-table approach, where all the required sine/cosine sample values are stored in a ROM, the CORDIC approach does not lead to the exponential growth of the hardware. Recent advances in IC fabrication technology, particularly CMOS, coupled with advanced DSP algorithms and architectures are providing possible single-chip DDFS solutions to complex communication and signal processing subsystems as modulators, demodulators, local oscillators (LOs), and programmable clock generators. The DDFS addresses a variety of applications, including cable modems, measurement equipments, arbitrary waveform generators, iv cellular base stations and wireless local loop base stations. The aim of this report is to compare some DDFS architecture and to try to find an optimized DDFS architecture .In this we also study about CORDIC (Coordinate rotation digital computer).Because CORDIC is main part of DDFS.