Design and Implementation of Adaptive Filters for Low Power and High Speed Applications

Abstract

The present work is an effort to design and implement adaptive filters that can be used as an adaptive noise canceller for de-noising of different signals. Two methods are used to design adaptive filters in SIMULINK. The first method involves the use of adaptive algorithm block present in SIMULINK library whereas second method involves the structural implementation of the weight update loop equation using basic blocks like multipliers, adders, delay elements etc. present in SIMULINK library. Five different 32 order adaptive filters (LMS, NLMS, SD, SE and SS) were designed using first method for de-noising of sinusoidal signal. Further optimum step size, range of step size and mean square error was calculated for each of these adaptive filters. Two step sizes viz. 0.002 and 0.0005 experimentally optimized for above mentioned adaptive filters has been selected for the implementation of four different variable step size adaptive filters (LMS, Sign-Data, Sign-Error and Sign-Sign) designed using second method for de-noising of audio signals. Three different structures viz. direct-form structure, transposed-form structure and the proposed novel structure has been used for this purpose. Further, the filters were implemented on three different Field programmable gate arrays (FPGAs) viz. Spartan 6, Virtex 6 and Viretx 7 and their speed, power and area utilization are computed. It was observed that due to significant reduction in the critical path, the proposed structure uses less number of slice LUTs resulting in a reduction in silicon area without incurring any significant overhead in terms of power or delay.