Designing and Implementation of GFP-T Frame Mapper

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Ethernet and SONET/SDH/OTN are on a crash course. With Ethernet continuing to push its way out of the enterprise into the access and metro sectors, developers of SONET equipment are being pushed to map Ethernet frames over SONET/SDH/OTN links. Packet traffic in a multitude of co-existing protocols is expected to dominate the flow of network communications traffic in the foreseeable future. The bulk of data transport will continue to be via SONET/SDH or subsequently Optical Transport Networks (OTN). Thus, an efficient generic enveloping protocol for adapting multiple types of packet traffic to SONET/SDH and OTN is needed. The generic framing procedure (GFP) fills this critical need and enables efficient provisioning of these multi-service data connections. GFP provides a generic mechanism to adapt traffic from higher-layer client signals over an octet synchronous transport network. Xilinx has provided a GFP-T core that performs this generic framing. But this Xilinx GFP core does not performs 8b/10b encoding/decoding rather it takes the data after 8b/10b encoding/decoding and forms a GFP-T frame. The requirement here is to send eight serial channels on a GFP-T stream. Incoming streams can be of type Gigabit Ethernet, Fiber channel (1Gb or 2Gb) or ESCON. As the GFP-T core does not perform 8b/10b encoding/decoding, thus before feeding the data to the GFP core there is a need to convert the serial data to the parallel (8-bit). This is done using the Xilinx CPCS Core, which performs serial to 10-bit conversion & 8b/10b encoding/decoding. Next step is to connect these two-xilinx cores (CPCS and GFP). There are eight streams coming from CPCS (each stream per CPCS core) and GFP core interface needs single stream. Thus for the whole setup to work it needs some glue logic in between these two cores. This glue logic is GFP-T Frame Mapper. The function of the GFP-T frame mapper is to multiplex the incoming streams from the CPCS and feed it to the GFP-T framer as a single stream. The GFP-T Frame Mapper was implemented in hardware using VHDL language and simulations were done using Model SIM software and synthesis using Leonardo Spectrum software. This work represents a critical first step and approach towards achieving an architecture through which any number of incoming channels can be mapped on the GFP-T core.

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