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dc.contributor.supervisorChatterjee, A. K.-
dc.contributor.authorKumar, Vivek-
dc.descriptionM.Tech. (VLSI Design and CAD)en
dc.description.abstractHigh avalanche breakdown field ( 1.0 – 3.0 MV/cm) for SiC makes it alternative material for high voltage, high power devices. Due to high thermal conductivity ( 5 W/cm-oC) and high electric field strength, Silicon Carbide can be used at high temperature, high voltage and high power applications. A 3C-SiC Lateral Double Implanted MOSFET is designed in a uniform lightly doped n + epilayer on an insulating 4H-SiC substrate. After depleting through the epilayer the depletion region continues to move laterally toward the drain. The result is an increase in blocking voltage (Avalanche Breakdown voltage of 4.31 kV , and Punch through breakdown voltage of 4 kV for a doping level of 5×1014 cm-3 in drift region). This punch through breakdown voltage results in a depletion width of 65.52 µm in drift region. The current in the device was found to decrease due to reducing mobility of electrons as we increase the doping level of the p-base region (µ = 580 cm2/V.s, for NB=1016 cm-3, to 192 cm2/V.s, for NB =1018 cm-3 respectively), for the device with Active Channel Length = 2µm and Width = 100µm. The V-I characteristics of the MOSFET that has been developed with and without channel length modulation (λ), and the value of Early-Voltage has been found to decrease with increase in doping of the p-base.en
dc.description.sponsorshipElectronics and Communication Engineering Departmenten
dc.format.extent5708802 bytes-
dc.subjectSilicon Carbideen
dc.subjectLateral DMOSFETen
dc.titleAnalysis of Current and Breakdown Voltages in 3C-SiC Lateral Power MOSFETen
Appears in Collections:Masters Theses@ECED

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