Temperature Dependent Analysis of Mixed Carbon Nanotube Bundle as VLSI Interconnects

Abstract

With advancement in technology as the scaling down of transistors has been accomplished, more and more number of transistors can be fit into a small area of Silicon making it more challenging for the design engineers and VLSI IC manufacturers. This is due to the fact that scaling down of transistors decreases the channel length which leads to more tendency of occurrence of leakage, power loss, thermal dissipation, scattering etc. in interconnects. Also incorporation of large number of transistors in a single IC has lead to the increase in length of interconnects needed which ultimately leads to more propagation delay and power dissipation. So to overcome these issues lot of materials used for interconnects are made thinner and longer but the earlier used materials like Al, Cu face the problems of electro-migration, grain boundary scattering etc. which hinders the overall performance of the circuit. In recent times CNT has emerged as a promising alternative to these materials as it displays some outstanding physical properties suitable for VLSI interconnects. They are one dimensional conductors operating at high frequencies and can carry very high current. Various parameters of different types of CNTs namely SWCNT, MWCNT, MCB have been worked upon by the researchers and it is found out that CNTs show better results than Cu in terms of propagation delay and power dissipation. Now it is important to optimize these parameters and find out which type of CNT works better. In this thesis Mixed CNT bundle (MCB) analysis is done by considering the temperature dependent impedance parameters and the results are compared with SWCNT and Cu at varied temperature and for different global lengths of interconnect. Also various structures of MCB were studied to find out the optimized structure in terms of delay and average power dissipation which can be considered for further studies and a structure with horizontally aligned equal halves of SWCNTs and MWCNTs in a bundle shows the overall better results than other structures of MCB as well SWCNT and Cu. To achieve this modeling of transmission line (TL) of these bundles is done to find out the delay and hence the performance. Meanwhile the results also depict that there is an increase in delay as the temperature increases. Analytical modeling for global length of interconnect is done by piece-wise transient analysis using alpha-power law model for CMOS inverter driving a π-RLC interconnect using a fast ramp input signal to predict the response. This response is compared to the SPICE simulation results showing that in the saturation region there is certain difference in the responses while keeping the same discharging time for both. This calls for the need to develop a new and better analytical model for the deep sub-micron technology.