Please use this identifier to cite or link to this item: http://hdl.handle.net/10266/2947
Title: A Novel Rate-2 Space Time Block Code & Implementation of its Decoder
Authors: Kumar, Utkarsh
Supervisor: Sharma, Sanjay
Keywords: MIMO;STBC;alamouts;FPGA
Issue Date: 14-Aug-2014
Abstract: Wireless communications have been developed widely and rapidly in the modern world especially during the last decade. Recent advance ment in wireless communication systems has entailed the develop-ment of various coding technique.Through these coding techniques, the reliability of wireless communication has also been increased. Space time block codes have achieved the high spectral efficiency, low complexity and good error performance in continued research in this field.But still the demand of higher rate of transmission is endless. In this thesis, we present a new high rate space time block code for two transmit antenna and one receive antenna. The presented Space Time Block Code transmits two symbols per time slot. Hence the code achieves double data rate of transmission. Using QPSK modulation technique, a data rate of 4 bits/Hz/sec has been achieved instead of 2 bits/Hz/sec. It has been shown that if perfect channel state information is available at the receiver, thehigher rate of transmission can be achieved. In this thesis, we have designed a new decoder of the proposed code and implemented it on FPGA board to show the practicability of the decoder VHDL is used for the development of decoder.Results are simulated on ModelSim simulator. Synthesis report shows that complexity of decoder is approximately same as that of conventional methods. Practicability of the proposed rate- 2 Space Time Block Code has been proved in this thesis.
Description: Master of Engineering-Thesis
URI: http://hdl.handle.net/10266/2947
Appears in Collections:Masters Theses@ECED

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