On Multistage Interconnection Networks - Singh, Birmohan (My University, 2007)
There are many different ways to organize computational structures to exploit parallelism. Many research efforts around the would are being conducted with purpose of determining that hardware and software organizations that are best suited for general purpose parallel processing. The communication subsystems linking processors, memory modules and input/output controllers in a parallel processing subsystem is one of its most important architectural features and has a profound impact on system capabilities, performance, size and cost. An interconnection network of the processors that provides the desired connectivity and performance at minimum cost is required for communications in parallel processing systems with a large number of components. Multistage interconnection networks play an important role in parallel computing systems. In multistage interconnection networks, the fixed inter stage connections between adjacent stages exist with a number of switches at each stage that are dynamically set to each establish the desired connection to route the requests from the inputs to the outputs. The distribution of switches as well as their complexity is very important in designing multistage inter connection networks are estimation of complexity, fault tolerance, communication efficiency, performance and cost. In this thesis, a survey of various regular and irregular multistage interconnection possibilities and performance parameters is provided. A new network named as FTII is proposed by modifying the existing FT network. Different standard irregular networks are analyzed for permutation passability parameter. Also, the permutation passability behaviour is simulated for some regular and irregular networks.
Keywords: Computational Structures; Communication Subsystems; Interconnection Network System; Computer Science